US – BURNSVILLE, MN

We are searching for a Principal level radio frequency integrated circuit (RFIC) design engineer to join a strong group of RFIC designers to help lead Sequans Communications in the development of RF transceivers to address the IoT and 5G markets. Working within a dynamic design team you will participate in the development of next generation RFIC products for IoT and 5G wireless communication networks.

RESPONSIBILITIES

• Specify, design and verify key circuits and sub-systems of integrated RF transceivers
• Work closely with other teams to facilitate the design and production process (e.g. Software, Signal Processing, Product Integration, Sales & Marketing)
• Provide broad technical expertise and mentor junior engineers within the team

PROFILE

• Highly motivated, pro-active self-starter
• Strong sense of ownership and responsibility
• Creative thinker with strong problem-solving skills
• Team oriented attitude
• Ability to thrive in a multicultural environment
• Ability to communicate well with cross-functional teams
• Excellent written and oral communications skills

REQUIRED EXPERIENCE

• Engineering degree in a relevant discipline. BSc, MSc or equivalent
• 7 to 15 years’ experience of relevant IC development
• Fluent English speaker
• Recent successful RFIC project contributions on highly integrated RF transceivers, ideally related to broadband wireless communication systems, e.g. WiFi or LTE, on a nanometer scale RF-CMOS technology
• Understanding of Low power / low noise design techniques for Analog and RF
• Knowledge of Design for Manufacture considerations on cutting edge processes
• Full appreciation of RF and baseband layout techniques

REQUIRED DETAILED KNOWLEDGE AT CIRCUIT LEVEL

• Multi-Band RF circuit design in the 700MHz to 7GHz range
• Proficiency in Cadence and/or Mentor frontend and backend tools are absolutely required
• Familiarity with RF lab equipment such as signal generators, spectrum analyzers, and vector signal analyzers is required

ADDITIONAL USEFUL EXPERIENCE MAY INCLUDE

• RFIC Sub-system and block level definition & specification
• Integrated single chip RF + Digital baseband projects
• Top level chip simulation and functional verification
• Analog behavioral language modeling (e.g. Verilog-AMS)
• Mixed-mode simulation environments (e.g. mixed verilog and device level )
• Direct conversion Rx and Tx architectures and associated considerations
• DFT and BIST for Analog and RF circuits
• Silicon test and de-bugging