BBIC Design Manager – Paris, France

  • 0
  • April 1, 2019

PARIS – FRANCE

As part of the engineering HW department, you will be responsible for the development of all Sequans next generation 4G/5G digital IC design from concept to tapeout.
You will manage a team of around 15-20 people (the team is spread between two sites: France and Singapore) with various skills (RTL, verification, DFT, Synthesis, layout, FPGA, palladium …).

Responsibilities:

  • Participation in the architecture definition of the next generation chipset
  • Leading and supporting the team to develop leading edge 4G/5G products, from RTL to GDSII
  • Line and Project Management of Baseband ASIC/FPGA Design Team (with sites in France and Singapore)
  • Relationships with partners (tool and IP providers, foundry)

Required experience and knowledge:

  • Good knowledge of the whole ASIC design flow, from RTL to GDSII (RTL, verification, synthesis, DFT, PnR)
  • Experience on semiconductor/wireless market
  • Strong project & team management experience
  • Excellent communication skills with very good customer orientation
  • Adept at working in a fast moving and multicultural environment

Profile:

  • Fast learning capabilities, highly motivated, self-starter, autonomous
  • Interested in challenges of new technologies and novel algorithms
  • Outstanding Management (project and people with 2 levels of reporting) and organizational skills
  • Outstanding communication skills
  • Team leader, very good customer orientation, team work orientation
  • Ability to work in a fast moving and multicultural environment
  • Team player, commitment & customer focus
  • Excellent written and oral communications skills, fluent English

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