Design Test Engineer

Responsibilities:

Within the ASIC team, you will contribute to the development of the next generations of 802.16/WiMAX SoC in deep sub-micron technology. You will be in charge of defining the test strategy of the chip and will be implementing all the test modes of the chip (testability of analog portion of the chip, SCAN, BIST, JTAG,…). You will work closely with the design team and with the layout team.

You will also be the main interface with the production test team during the debug phase before releasing the chip for production.

Good communication skills are required.

Required Experience:

Engineering Degree
Knowledge of ASIC development flow
Verilog or VHDL knowledge
Knowledge of DFT techniques such as SCAN, BIST is a plus
0 to 3 years experience in DFT and/or ASIC development
Fluent in English

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